Kilo-Instruction Processors: Overcoming the Memory Wall
نویسندگان
چکیده
منابع مشابه
Kilo-instruction Processors
Due to the difference between processor speed and memory speed, the latter has steadily appeared further away in cycles to the processor. Superscalar out-of-order processors cope with these increasing latencies by having more in-flight instructions from where to extract ILP. With coming latencies of 500 cycles and more, this will eventually derive in what we have called Kilo-Instruction Process...
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ژورنال
عنوان ژورنال: IEEE Micro
سال: 2005
ISSN: 0272-1732
DOI: 10.1109/mm.2005.53